Classification of programmable logic devices

Logic devices can be divided into two categories-fixed logic devices and programmable logic devices. As the name suggests, circuits in fixed logic devices are permanent, they perform one or a set of functions-once manufactured, they cannot be changed. On the other hand, programmable logic devices (PLD) are standard finished parts that can provide customers with a wide range of logic capabilities, characteristics, speed, and voltage characteristics-and such devices can be changed at any time to complete many different Function.

This article will focus on the introduction of programmable logic devices. The full English name of programmable logic devices is programmable logic device or PLD. PLD is produced as a general-purpose integrated circuit, and its logic function is determined according to the user's programming of the device. The integration level of general PLD is very high, enough to meet the needs of designing general digital systems.

For programmable logic devices, designers can use inexpensive software tools to quickly develop, simulate, and test their designs. Then, you can quickly program the design into the device and immediately test the design in the actual running circuit. The PLD device used in the prototype is exactly the same as the PLD used in the official production of the final device (such as a network router, ADSL modem, DVD player, or car navigation system). In this way, there is no NRE cost, and the final design is completed faster than when using custom fixed logic devices.

Classified according to institutional characteristics, programmable logic devices can be divided into array-type devices PROM, EPROM, EEPRM, PAL, GAL, CPLD, EPLD, EPLA, etc. based on the "and-or" array structure.

1. PROM-programmable read-only memory

Programmable read-only memory is only allowed to be written once, so it is also called One Time Programming ROM (OTP-ROM). When the programmable read-only memory leaves the factory, the stored content is all 1, and the user can write data 0 in some of the units as needed (some PROMs have all 0 data when they leave the factory, and the user can set some of the units Write 1) to achieve the purpose of programming.

2. EPROM-erasable programmable read-only memory

The first EPROM that was successfully developed and put into use was erased with ultraviolet light. EPROM adopts MOS type circuit structure, and its memory cell is usually composed of stacked gate-type MOS transistors, and stacked gate-type MOS transistors usually adopt enhanced field effect transistor structure.

3. EEPROM-electrically erasable programmable read-only memory

EEPROM (can also be written as E2PROM) is a programmable ROM that can be erased and rewritten with electrical signals. It can not only erase the contents of the memory cell as a whole but also erase and rewrite word by word. The erasing and rewriting current of EEPROM is very small, and it can be carried out under a normal working power supply, and there is no need to remove the device from the system when erasing.

4. PAL-Programmable Array Logic

PLA follows the fuse type bipolar process used in the production of PROM devices. It has an "AND" array programmable and an "OR" array fixed structure, and can also achieve a very high working speed. Compared with PROM, PLA devices have a greatly reduced array size and can realize various logic functions more flexibly. PLA devices have simple programming and strong adaptability and can replace a variety of commonly used small and medium-sized transistor logic devices.

5. GAL-general array logic

GAL is an electrically erasable and reprogrammable logic device. It has a flexible programmable output structure so that the few centralized GAL devices can replace almost all PAL devices and hundreds of small and medium-sized standard devices. Moreover, GAL adopts advanced EECMOS technology, which can complete the erasing and writing of the device within a few seconds, and allows repeated rewriting. Ordinary GAL devices and PAL devices have the same array structure, and both adopt an AND array programmable or fixed array structure.

6. CPLD-complex programmable logic device

CPLD is a large-scale integrated programmable logic device developed on the basis of PAL, GAL, and other devices. Compared with PAL, GAL, and other devices, the scale of CPLD is relatively large. One CPLD can replace dozens or even hundreds of general-purpose devices. IC chip. Although the CPLD mechanisms produced by different IC companies are very different, they generally include programmable logic macrocells (Logic Macro Cell, LMC), programmable I/O units, and programmable interconnects (Programmable Interconnect, PI). three parts.

7. EPLD-erasable programmable logic device

EPLD combines the advantages of large-scale integrated circuits such as small size, low price, and high reliability. Users can design special circuits according to their needs to avoid problems such as high prices and long cycles. The delay time of EPLD devices is predictable and fixed. Therefore, any function implemented on the function template in the EPLD device has the same speed. Functional modules are interconnected together through unlimited internals, providing multiple programmable logic structures. Each functional module contains 9 programmable "and" "or" array-driven macrocells. The input of any pin or the output of the macro cell can be connected to the input of another macrocell. The programming interconnects structure ensures that the EPLD has 100% wiring capacity.

8. FPLA-Field Programmable Logic Array

Field Programmable Logic Array (FPLA) is a type of Programmable Logic Device (PLD), which is a semiconductor device that contains the so-called "logic block" and programmable interconnects in programmable logic elements. Logic blocks are programmed to perform the functions of basic logic gates, such as "and" "exclusive OR" or more complex combination functions. In most FPLAs, logic blocks also include memory molecules and hierarchical programmable interconnects to meet the need for logic blocks to be interconnected. In addition, the structure of FPLA is similar to ROM. The difference is: firstly, the ROM and array are fixed, while the FPLA and array are programmable; secondly, the ROM and array output are all the smallest items, while the FPLA and array You can output a simplified expression. The system designer performs any logic function according to the customer or designer's needs, so it is named "field-programmable".

9. FPGA-Field Programmable Gate Array

FPGA is further developed on the basis of PAL, GAL, CPLD, and other programmable devices. It is a device based on the cell gate array structure. Because FPGA needs to be burned and written repeatedly, its basic structure to realize combinatorial logic cannot be completed by a fixed NAND gate like ASIC, but can only adopt a structure that is easy to repeatedly configure. At present, mainstream FPGAs all use look-up tables based on SRAM technology. Some military supplies and aerospace-grade FPGAs use look-up table structures of Flash or fuse and anti-fuse technology. The method of changing the content of the look-up table is achieved by burning files Repeated configuration of FPGA.

According to the Boolean algebra theory, for a logical operation with n inputs, no matter it is an AND or NOT operation, there may only be 2n results at most, so if the corresponding result is first stored in a storage unit, it is equivalent to achieving NAND. The function of the gate circuit. The principle of FPGA is also the same. It configures the contents of the lookup table by programming files so that different logic functions can be realized in the same circuit.